[Translate to Englisch:] Comprehenisive Chip Desing and Verfication

ChipGlobe areas of expertise

Functional and mixed-signal Verification

  • Constrained random coverage driven verification
  • Mixed signal metric driven verification
  • UPF/CPF power aware verification
  • Verification planning and verification management
  • support of SystemVerilog, UVM, Verilog, VHDL, SystemC, e environments
  • setup of testbench architecture

+ Big global player experiences
+ "First time right" methodology