ChipGlobe areas of expertise

RTL 2 GDS (front-end & back-end)

• Synthesis
• Layout
• (Mixed signal) STA
• DFT
• Verification

Comprehensive chip design management

• Project management
• Communication flow
• Team building/ staffing
• Vendor handling & support
• IP handling (integration, implementation, royalties)
• Design lead
   

Leading edge technology

• Constraining (upf/cpf)
• Power analysis
• Prototyping
• Layout verification (DRC/LVS)
• Extraction
• CTS
• Test simulation
• Pattern ATPG
• Formal verification

+ Big global player experiences
+ "First time right" methodology